Read-only memory system



Dec. 10, 1968 .1. VAN GOETHEM 5+ AL 3,416,143

READ-ONLY MEMORY SYSTEM Inventors JAN VAN 6057/1677 RENE 05 $17507 ANORE AJAUIVARS Dec. 10, 1968 J. VAN GOETHEM ETAL 3,416,143

READ ONLY MEMORY SYSTEM Filed Jan. 19,1965 3 Sheets-Sheet 3 I nvenlors JAN ynw men/en RENE DE 5"07' United States Patent 3,416,143 READ-ONLY MEMORY SYSTEM Jan Van Goethem and Reu De Smedt, Antwerp, and

Andr Ernest Antoon Lauwers, Muizen, Belgium, assignors to International Standard Electric Corporation, New York, N.Y., a corporation of Delaware Filed Jan. 19, 1965, Ser. No. 426,585 Claims priority, application Netherlands, Jan. 24, 1964, 6400537 6 Claims. (Cl. 340-173) ABSTRACT OF THE DISCLOSURE The present disclosure relates to a read-only memory system including a two co-ordinate arrangement of reactive cross-point couplings, each being connected between a particular pair of electrical conductors, one conductor out of a first set of n conductors and the other conductor out of a second set of m conductors, input circuits via which an input or linearly increasing interrogation signal may be applied to an electrical conductor out of said first set, the output information corresponding to the interrogation of this conductor appearing in output circuits which are coupled to the electrical conductors of said second set.

Such a read-only memory system is described in the French Patent 1,245,808 (J. Van Goethem 7). Therein an electrical conductor or row wire out of n conductors or row wires of the first set is coupled through reactive cross-point couplings to m-x conductors or column wires of the second set x m). The interrogation of a particular row is performed by applying thereto, through the above said input circuits, an interrogation signal which has a sine waveform. A l-output signal then appears at the outputs of the mx columns reactively coupled to this row, whereas a 0-output signal appears at the outputs of the remaining x columns which are not reactively coupled to the above particular row. However, the actual O-output signal is not a signal having a 0- amplitude but a signal having an amplitude y, situated between the above 0- and l-ampli tudes. This increase of the amplitude of the O-output signal from the 0-level to the y-level is due to the existence of residual and internal couplings in the above two-coordinate arrangement. For a similar reason the actual l-output signal has an amplitude z which is smaller than the normal l-amplitude. Hence the O- to l-output signal ratio increases from zero towards the unity so that the discrimination of the 0- and l-output signals may become difficult. It is easy to understand that this difficuity increases when the size of the two co-ordinate arrangement is increased, the above 0- to l-output signal ratio tending then to the unity, and the discrimination of the 0- and l-output signals becoming then more and more difficult and involving complicated output circuits.

It is therefore an object of the present invention to provide a read-only memory system of the above type but in which the 0- to l-output signal ratio is constant and of small value and is independent from the number of rows, columns, reactive cross-point couplings and input and output impedances of the two co-ordin'ate arrangement.

The present readonly memory system is characterized by the fact that the waveform of said input or interrogation signal varies linearly during the interrogation time.

The above mentioned and other objects and features of the invention will become more apparent and the invention itself will be best understood by referring to the following description of an embodiment taken in conjunction with the accompanying drawings wherein:

FIG. 1 represents an electrical configuration of a read- Patented Dec. 10, 1968 only memory system including a two-coordinate arrangement of capacitive cross-point couplings in Which an interrogation signal is applied to a rowor input conductor.

FIGS. 2, 3 and 4 show equivalent electrical circuits of a particular column circuit of the two co-ordinate arrangement of FIG. 1, assuming all other columns removed.

FIGS. 5, 6 and 7 represent equivalent electrical circuits of the configuration of FIG. 1;

FIG. 8 is a two co-ordinate diagram showing two current variations in a read-only memory system having particular element values.

Principally referring to FIG. 1, the capacitive matrixmemory shown therein has m columns identified by the references K K K K and )1 rows identified by the references W W W The most adverse case is considered: at each crosspoint of this matrix there is provided a capacitive or a lcoup-ling through a capacitor C, except at the cross-point of the row W and the column K,- where no real coupling is provided but only a residual one which is represented by the residual capacity C between the column wire K and the row wire W The capacitors C and C stand for the row wire-toground and column wire-to-ground capacities respectively. The grounded resistors R in the column wires K K represent the input impedances of the column or output signal amplifiers e.g. grounded base transistors, which form part of the output circuits indicated by the block OC, whereas the grounded resistors R in the non-interrogated rows W W represent the impedances seen by these rows.

The resistors R form part of gating circuits of the input or access circuit, indicated by the block AC and described in the previously mentioned French Patent 1,245 ,808. The row W is an interrogated row and E represents a voltage generator, generating a linearly increasing voltage or ramp voltage E which constitutes the interrogation or input signal applied thereto through the gating circuits of AC and which is equal to v.t. v being a constant voltage slope and t being the time variable. In response to this input signal B, an output current i flows to ground through the input resistance R of each column amplifier, except through the input resistance R of the column amplifier of the column K through which a current i different from i flows. The currents i and i correspond to a l-output and a O-output signal respectively. The output current i is composed of the sum of two currents i' and i i being the current determined by the residual or leakage capacity C and 1" being the current determined by the coupling of the column K,- with all the other columns through the cross-point capacitors C. Hereinafter the l-output current i will be calculated in order to make clear the effects resulting from the use of the above mentioned linearly increasing interrogation signal E.

Referring to FIG. 2 the circuit represented therein is an equivalent circuit of the column K of the arrangement of FIG. 1 in which all the columns except the column K considered are removed. The cross-point capacity C between row W and column K has been combined with the capacity C of the column wire K to ground, into a single capacity C4-C The interrogation voltage signal E=vt is therefore substituted by 0 E1- v C 02 t and it is assumed that this signal E is generated by an equivalent voltage generator E The other constituent elements of this figure and their values may easily be found from FIG. 1. Referring to the circuit of FIG. 3, this circuit is obtained from the circuit of FIG. 2 by remarking that in practice the capacity C is much larger than the capacity C and hence one can neglect the voltage drop across (nl) C against that across (ll-l) C. Referring to the circuit of FIG. 4, this circuit is obtained from the circuit of FIG. 3 by combining the capacities C+C and (n. 1C) into a single capacity C -l-nC. The voltage generator E is therefore substituted by an equivalent voltage generator E which generates a voltage signal C2-l-nC From the circuit of FIG. 4 the following first order differential equation may easily be obtained:

d i 1 G1) on R2(Cz+ (o2+no)R2 (1) Solving the above Equation 1, it is found:

1 110 1 6T with T=R (C -142C) (3) and it is seen that the current i available at the input of the column amplifier is an increasing current which, after a sufliciently long time interval, e.g. tZ3T, substantially reaches the asymptotic value vC. This asymptotic value is the value of the current injected in the column wide K by the ramp voltage E vt and is independent of the store size, the input impedance R of the column amplifier and the impedance R of the non interrogated rows. However, the time factor T increases when increasing the number of rows n so that the time interval after which the current i reaches the asymptotic value vC, also increases. The curve showing the variation of the current i (in micro amperes) in function of time t (in microseconds) has been traced in FIG. 8, for a capacitive memory having the following element values:

For this memory 95% of the asymptotic value vC=19. VC=19.8/LA. is attained after a time interval 3T=.7125/L see. It is to be noted that the value of T given by the relation (3) is a maximum value, since it has been assumed that in all the cross-points of the column K there is a capacitive coupling C, the capacity C being in practice larger than the residual capacity C.

Hereinafter the O-output current i will be calculated in order to make clear the effects resulting from the use of the above mentioned linearly increasing interrogation signal E.

Referring to FIG. 5 the circuit shown therein is obtained from the configuration of FIG. 1 by combining, the column K being excepted, the remaining m-1 columns into a single one indicated by SKm-l. Referring to the circuit of FIG. 6 this circuit is obtained from the circuit of FIG. 5 by combining the elements of the (11-1) non interrogated rows, the leakage capacity C having been disregarded with respect to the capacity (n1) C. Referring to the circuit of FIG. 7 this circuit is obtained from that of FIG. 6 by the simple combination of the capacities (mi-DC and (m1)C into a single capacity (ml). (C-i-C The voltage signal E=vt has been replaced by in order to take into account this combination of capacities.

Reference being made now to FIGS. 1, S, 6, 7 and especially to FIG. 1, as already mentioned above, the current i flowing to the column amplifier of the column K is the sum of two currents i and i the current i being due to the residual or leakage cross-point capacitive coupling C' and the current i being due to the internal capacitive couplings of the column K with all the other columns.

The current may be calculated in the same way as the current i by considering the column K,- and it results therefrom that the current i' attains the asymptotic value Considering again the capacitive memory having the previously mentioned element values, the relation (5) applied thereto becomes:

t t t i ,:0.637 30.1 -126 28.96

The curve showing the variation of this current i" has also been traced in FIG. 8 and it may be seen that after 0.8/ sec. the polarity of the current i" is reversed, and is then negligible and obviously has a favourable eifect on the discrimination of the 1- and O-output signals. Thus, if the read-out operation of the above capacitive memory is performed, e.g. 1 microsecond after the ramp voltage interrogation signal has been applied, the 0- to l-output signal ratio is constant and of small value so that the discrimination of the output signals by the output circuits may be made in a safe manner. Also it is to be remarked that it is no longer essential to have low impedance rows and columns since these impedances only affect the time factor T=R (C +nC) and hence only the reading speed, lower impedances permitting higher reading speeds. These impedances are now calculated for satisfying only to the involved reading speed, higher row and column impedances simplying in general the access and read out equipment.

From the above discussion it results that an increase of the system reliability as well as a reduction of the cost of the access and read out equipment can be obtained due to the ramp voltage waveform of the interrogation signal.

It is also to be noted, the duality between the capacitive and inductive stores being well known, that the advantages offered by using a ramp voltage signal for interrogating a capacitive store are also valid for an inductive store when interrogating it with a ramp current signal.

Also, although the invention has been described in relation to coupling immittances which are directly proportional to frequency, this in association with input signals with amplitudes varying linearly with time, other types of immittances as well as other shapes for the reading waveform may be envisaged.

While the principles of the invention have been described above in connection with specific apparatus, it is to be clearly understood that this description is made only by way of example and not as a limitation on the scope of the invention.

We claim:

1. Read-only memory system including, a two coordinate arrangement of cross-point coupling impedances of two or more distinct values, each established between a particular pair of electrical conductors, one conductor out of a first set of n conductors and the other conductor out of a second set of m conductors, interrogation means via which an interrogation signal may be applied to an electrical conductor out of said first set of n conductors and output or reading means coupled to said electrical conductors of said second set of m conductors, said interrogation signal generating at least two distinct output signals, e.g. a one or a zero output signal, in accordance with the value of said coupling impedance, in each conductor of said second set of m conductors, and said output means detecting or reading the output signals generated in the conductors of said second set, characterized in this, that said interrogation signal is such a linearly increasing predetermined function of time that after a predetermined time interval from the moment it is applied to said conductor of said first set of n conductors, said distinct output signals generated in the m conductors of said second set reach substantially constant and distinct values, the cross-point coupling impedance values of the 22-1 non-interrogated conductors of said first set with the In conductors of said second set becoming then infinite and without effect on said first and second values of said output signals whereby said constant and distinct values are independent of m and n and that said memory system further includes enabling means which enable said output means to detect or to read said output signals only during a reading time interval which follows said predetermined time interval.

2. Read-only memory system as claimed in claim 1, characterized in this, that said interrogation signal is a predetermined function of time only up to the end of said reading time interval.

3. Read-only memory system as claimed in claim 1 characterized in this, that said cross-point coupling impedances consist of frequency dependent impedances.

4. Read-only memory system as claimed in claim 3, characterized in this, that said cross-point coupling impedances consist of reactive impedances.

5. .Read-only memory system as claimed in claim 4, characterized in this, that said reactive impedances are purely capacitive, and that said interrogation signal is a voltage signal of which said predetermined function of time is linear.

6. Read-only memory system as claimed in claim 4, characterized in this, that said reactive impedances are purely inductive, and that said interrogation signal is a current signal of which said predetermined function of time is linear.

No references cited.

TE/RRELL W. FEARS, Primary Examiner.

US. (:1. X.R.I 340166 

